Top 5 Beginner PCB Design Mistakes (and how to fix them)

(energetic music) – Hi, I'm Phil Salmony, a
technical consultant for Altium and in this video I'd like
to go through some common beginner PCB design mistakes
and how to remedy them. I'll show you some guidelines
for layout and rooting and that will really help
you improve your PCB designs. I do a fair amount of design reviews for PCB design engineers
and these are issues that come across frequently. These issues can be harmful
for signal integrity, EMI and so forth, so it's really good that we
tackle them in this video. If you'd like to give Altium
Designer a try for yourself, please check out the
link in the description to get a free trial of Altium Designer. Without further ado, let's get started. The most common PCB design mistake I see that novice PCB designers make is that of trace spacing and to me this is one of
the most important aspects.

Normally from a manufacturer's website or when contacting your
manufacturer they'll let you know what their manufacturing capabilities are. So what are the minimum
clearances they can produce, trace spacing, track to
pad, to through holes, to Vias and so forth. And this information you would then enter into Altium Designer, go into design rules and you'd import all of your information from where you're manufacturing and this sets up your minimum clearances and with trace widths and so on. Now, this is all fine and good and usually this is the
first step the PCP designer could usually do with an
initial board to design, but then once this has been imported that doesn't mean you should
stick to the minimum clearances and trace widths possible.

For example this design here, this is a microcontroller
with a lot of these pins needed to be rooted out. This might be ADC channels,
net digital channels and so on. What I often see is this kind of pattern immediately coming out
with a irrelevant IC, the PCB design has chosen just to simply to use the minimum clearance and root all of these
traces next to each other. This is bad for several reasons. First of all, this is right at the edge of the manufacturer's capabilities, so things could go wrong.

If we're right at the
manufacturer's capabilities, means we might get a lower PCB
yield, but more importantly, because of these really narrow
spacings between these traces we're gonna get cross coupling
between these signals. So a signal may be
apparent at ADC input five will couple over quite strongly
depending on the length of these parallel segments and the rise time of these
signals ADC in one five will couple in over to ADC
in one six and vice versa, simply because we are not
keeping enough clearance between these traces. Let me show you a better
way of routing these traces. We have the space, so let's use it. I would like to root out
the pad and it immediately goes far away as I can within reason, of course take in account to
decoupling capacitors and so on and give myself as much
clearance as possible from all these other traces. For example, like so, compare
this to the situation before we've increased our spacing considerably and this will minimize our crosstalk. A good rule of thumb is
to keep a minimum spacing or clearance between traces of three times the dielectric thickness.

If you go to design layer stack manager, we can see the board stack up. So with layer one, signal to ground, we have a dielectric in
between of 0.1 millimeters. So this rule means keep
at least three times the dielectric thickness
space in between traces, which is 0.3 millimeters
in this specific example. So for example, this
trace on the left here has a clearance of 0.6 millimeters, so we're well above 0.3 millimeters. Now there might be situations where you can't keep this spacing. It will be inevitable in some PCB designs, but the important thing is
that if you have the space you should use it. Also try to keep the parallel
segments between traces as short as possible. Another common beginner PCB design mistake is to use the same trace
width for any type of trace. So be this an ADC trace,
a high impedance node, a high speed signal trace or power trace. It might seem convenient to just use the same
trace with everything, but it certainly isn't optimal.

For example, if we look at
this ADC input trace over here, this will be high impedance. For high impedance trace which
is very sensitive to noise, I want to minimize any coupling to this and the way I can do that is
by reducing my trace width. So I root out of this this, I don't want to use, for
example, a 0.5 millimeter trace, I want to use something
quite considerably smaller. It can't of course be generalized to what trace width we
should always be using, but 0.5 millimeters is a
very broad, thick trace. So I might use something for
example, 0.2 millimeters. Remember you should stay within your manufacturing capabilities and far away from any extremes. Compare that to, for example
rooting this 3.3 volt trace.

3.3 Volt trace I don't want to root, for example at 0.1 millimeters
or 0.2 millimeters, typically power traces
will carry some form, will carry more current
than a signal trace and then again, this
depends on the example. Sometimes you might even
want to use whole planes to carry power. In this case, this is simply to feed some sort of external circuitry,
maybe a couple milliamps. With a trace width of 0.5 millimeters, for example, as I'm rooting out here you can actually carry quite a considerable amount of current. To see what current a trace can carry, I highly recommend Saturn
PCB design, PCV toolkit. If you go to the conductor properties tab, we can type in a conductor
width, PCB thickness, copper weights and so on, you can leave most of this as default, but we can vary the conductor width.

So if I type 0.5 millimeters,
as in our example and click solve on the bottom right, you can see the conductor
current or the maximum is over one to half amps for
such a fairly small trace. So we shouldn't overdo the size or the width of a conductor traces, we should always optimize
for the situation we're in. Even if we go down to
a 0.2 millimeter trace and click solve, this
can carry almost an amp, which is quite surprising to most people.

We can also of course see the voltage drop over a certain distance,
power dissipated and so forth. So remember to vary your trace width depending on what signal
or power you're rooting. A special case of course needs to be made for controlled impedance traces, this is not in the scope of this video. As with trace width, we
can also look at Via sizes and dimensions. For Vias we have a few more parameters that we can play with. In this example, we'll just be looking at the
simple through hole Vias, so nothing fancy such as
buried or blind Vias and so on. You can see a couple of
example Vias on the screen at the moment, we won't have typical Vias, if we look at the top one
that has a 0.9 meter diameter, so this is the entire Via diameter with a hole size of 0.5 millimeters. If we take the diameter 0.9 millimeters, subtract the hole size 0.5 millimeters and divide that by two, we get the size of the annular ring.

So 0.9 minus is 0.5 over
two is 0.2 millimeters. So the width of this ring
here is 0.2 millimeters and this is often times
a very determining factor for the manufacturer or the
manufacturer's capabilities. Typically you want an annular ring of around 0.15 millimeters. Of course there are times where you need a smaller annular ring for very dense designs,
fine pitch BDAs and so on, but as a rule of thumb, you want at least 0.15
millimeters annular ring. The hole and pad size also will vary depending what requirements you have. For example a thicker board. will typically require a larger drill size to be manufacturable.

My go to Vias are 0.7 millimeter diameter and 0.3 millimeter drill. If I require a smaller Via for example, this might be very small, I go with 0.5 millimeters
pad and 0.2 millimeters hole. Of course the size of my Via determines also the current
carrying capabilities. Again, as a demo using the
Saturn PCB design toolkit, I can type in Via hole diameter,
pad diameters and so on. If I just take the default
with a 0.25 millimeter Via hole and a 0.5 millimeter pad and click solve, you can see the Via
current is about two amps and this is a pretty good rule of thumb.

A normal sized Via will
be able to handle about one to two amps of current. So if you're rooting for
example, a power supply, you can use that as a rule of thumb to how many Vias you need to be able to supply this
amount of power or current. In beginner PCB designs,
I often see annular rings like the Via you see over here.

So a very large drill and
comparatively a very small pad and we get this very,
very thin annular ring and this is something you
should definitely avoid. So if you're unsure, stick to one of these default Via sizes, 0.7 millimeter pad, 0.3 millimeter drill as you get more comfortable to knowing what Via size is right for you. Another very important and
incredibly overlooked aspect when starting out with PCP design is placement and in particular, proper placement of decoupling capacitors. Because of the nature of
power distribution networks we're gonna have resistances,
inductances in path where in series or a power
distribution network, would, can lead to severe
voltage drops at ICs, if they suddenly require
large gulps of current. The way we can mitigate that is by placing local energy
storages directly at the IC pins and with focus being on pretty
much directly at the IC pins. For example, this
microcontroller in this picture is a QFP package, has
power and ground pins, for example, 18, 19. If I grab my decoupling capacitor, which also has the same
pins, so ground and power, a lot of times you will see beginners place the
decoupling capacitors far out with very thin traces
for example like this, and this is as far away as what you should be doing as you can be.

What we want is our local energy storage to be as close as reasonable to the pins, for example like this, making sure we can still root out from the remainder of the package and this can of course
become quite difficult and it becomes a challenge
as of what to prioritize. Typically, below speed
designs will have rooted power and a dedicated or at least
one dedicated ground plane directly below the IC. This way you can drop a Via
below and then root power. If you then also have
a dedicated power plane and this example may be a 3.3 volt plane, we can place Vias between the components power and ground pins and between
this decoupling capacitor, so we also get the benefit of
the capacitance of the plane.

For example, you won't
see a structure like this, which is actually a great
method of decoupling or bypassing these IC pins and we still have to root out the tracks. We have ground power pins, closely spaced Vias
within reason of course, for manufacturability, which
go to the internal power and ground planes and then
this decoupling capacitor close to the relevant IC pins. If you measure, we simply
have a very small distance of about two millimeters
between the relevant pads.

Keep in mind I've also
tried to keep clearance between the Vias and any
other non-related pads. Then I can simply root out with a trace that's as wide as the IC pad
into the Via on both sides and then use thick traces from the decoupling
capacitor pads into the Vias, for example, like so, for closely spaced Vias
this minimizes inductance, we've placed our decoupling capacitor very close to the IC pins, that's still given us space to root out the relevant microcontroller pins.

The final tip I'd like to give you is using solid reference planes, directly adjacent to any signal layer as well as directly
adjacent to any power planes you might have. Oftentimes in more complicated PCB designs and multilayer stackups, you'll have more than one ground plane. Here are also some tips
and some beginner mistakes I often see that you should avoid. In this example, I have a
solid ground plan on layer two and on layer three. On layer one, I then might have signals. You always want to keep any signal trace running adjacent to a reference plane. This is ground typically, but can also in certain
cases be power plane. So remember to route signals and power over a reference plane. In certain cases of course, you might have to root your signal traces close to Vias of different
tracks or not ground Vias. You can see as I move this
power Via for example around, below in Altium I can see the
ground plane has been voided, of course I have to keep
some clearance between different net Vias,
pads, planes and so on. If have a really close power Via my track is actually running
over a tiny bit of a void of the ground plane underneath.

My ground plane underneath has
been cut because of this Via, so a better way now to root this trace, to make sure I have a solid
ground plane underneath is for example, like so. Not only do I want to have my ground plane directly underneath, I also
want to have space underneath that is still filled with ground. For example, like this
satisfies the requirement that we need to have a ground
plan directly below the trace, but it doesn't satisfy the requirement that we need to have a ground
reference either side as well. This is because we have fields
between the signal trace and the ground plane below and the fields don't just
appear directly below the trace, but they spread out. So thank you very much
for watching this video. I hope these PCP design tips were useful and you can incorporate them
into your next PCB designs or even improve some old
PCB designs of yours. Thank you for watching and I hope to see you in
the next video, bye bye..

As found on YouTube

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